Hi Vladimir,
On Mon, 2016-04-25 at 04:00 +0300, Vladimir Zapolskiy wrote:
> The change adds separate device nodes for SIC1 and SIC2 interrupt
> controllers and reparents all defined SIC1 and SIC2 interrupt
> producers to the correspondent interrupt controller, this is needed to
> perform switching to a new LPC32xx MIC/SIC interrupt controller driver.
>
> Signed-off-by: Vladimir Zapolskiy <vz@xxxxxxxxx>
> ---
> Changes from v1 to v2:
> * squashed two step change in lpc32xx.dtsi - new irqchip driver can be
> used (i.e. board boots with access to userspace) with old DTS file,
> so there is no need to fix DTS firstly and then switch to a new driver,
> * removed "interrupt-controller-name" and "wakeup-sources" properties
> from all interrupt controllers,
> * removed outdated comment.
>
> arch/arm/boot/dts/lpc32xx.dtsi | 58 +++++++++++++++++++++++++++++-------------
> 1 file changed, 41 insertions(+), 17 deletions(-)
>
> diff --git a/arch/arm/boot/dts/lpc32xx.dtsi b/arch/arm/boot/dts/lpc32xx.dtsi
> index 73c4746..4570ddc 100644
> --- a/arch/arm/boot/dts/lpc32xx.dtsi
> +++ b/arch/arm/boot/dts/lpc32xx.dtsi
> @@ -92,7 +92,8 @@
...
>
> - /*
> - * MIC Interrupt controller includes:
> - * MIC @40008000
> - * SIC1 @4000C000
> - * SIC2 @40010000
> - */
> mic: interrupt-controller@40008000 {
> compatible = "nxp,lpc3220-mic";
> interrupt-controller;
> @@ -327,6 +326,28 @@
I think your are missing one change in your patch,
the mic register range should be 0x4000, not 0xC000.
Everything else is OK.
> #interrupt-cells = <2>;
> };
>
> + sic1: interrupt-controller@4000c000 {
> + compatible = "nxp,lpc3220-sic";
> + reg = <0x4000c000 0x4000>;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> +
> + interrupt-parent = <&mic>;
> + interrupts = <0 IRQ_TYPE_LEVEL_LOW>,
> + <30 IRQ_TYPE_LEVEL_LOW>;
> + };
> +
> + sic2: interrupt-controller@40010000 {
> + compatible = "nxp,lpc3220-sic";
> + reg = <0x40010000 0x4000>;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> +
> + interrupt-parent = <&mic>;
> + interrupts = <1 IRQ_TYPE_LEVEL_LOW>,
> + <31 IRQ_TYPE_LEVEL_LOW>;
> + };
> +
...
Sylvain
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