> On Apr 22, 2016, at 2:22 AM, Mark Brown <broonie@xxxxxxxxxx> wrote: > > On Fri, Apr 22, 2016 at 09:17:46AM +0800, Xing Zheng wrote: > >> Hi Mark, the other question here, how do we make sense to use the >> simple-card to call the "snd_soc_dai_set_pll" if the codec (like da7219) >> requires do this? > > What we should do there is move the CODEC clocking to be represented > using the clock API and then there are common clock bindings that > already exist for configuring clocks. I’m a little bit curious about this. I’m working with the clocking on the tlv320aic32x4 driver because I’m dealing with a platform that will be clocking it from a dynamic clock controlled by the CCF. That presents some problems because the aic32x4 driver has a table of clock parameters and those rely on the mclk rate being a precise value. The mclk might not be able to provide those exact values, so the aic32x4 driver needs to set its PLLs and dividers accordingly. The hardware has a couple of clock muxes, a few dividers and the PLL. It seems to be able to be modeled by the current CCF components fairly well. I’m just trying to wrap my head around where this all would fit in. Should the codec driver just register a bunch of clock components in its initialization somewhere? I’m thinking that it can’t have its own CCF driver separate from the codec driver because you won’t have proper access to the registers over I2C or SPI. I don’t find a lot of examples in the codec drivers, and there aren’t very many other drivers in the tree that seem to register clocks with CCF that I can find. I’m happy to work through this with the aic32x4 driver. I just need some guidance on how to do it so it fits in well with everything else surrounding it. -- Jeremy McDermond (NH6Z) Xenotropic Systems mcdermj@xxxxxxxxxxxxxx -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
