* Keerthy <j-keerthy@xxxxxx> [160403 22:38]: > This is w.r.t J6/J6eco: 32clk is pseudo (erratum i856) - clock source. > Errata i856 for the AM572x (DRA7xx) points out that the 32.768KHz external > crystal is not enabled at power up. Instead the CPU falls back to using > an emulation for the 32KHz clock which is SYSCLK1/610. SYSCLK1 is usually > 20MHz on boards so far (which gives an emulated frequency of 32.786KHz) > > Modelling the same in device tree. > > Acked-by: Tero Kristo <t-kristo@xxxxxx> > Signed-off-by: Keerthy <j-keerthy@xxxxxx> > Signed-off-by: Lokesh Vutla <lokeshvutla@xxxxxx> > --- > Errata Document: http://www.ti.com/lit/er/sprz429h/sprz429h.pdf > Errata number: i856 > > Tested the debugfs clock tree nodes on DRA7-EVM. > > Changes in v3: > > Rebased to 4.6-rc2 > Tested on top of omap-for-v4.6/fixes-rc1 branch and the patch applied > cleanly. Thanks applying into omap-for-v4.6/fixes. Tony -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
