On 03/18/2016 02:05 PM, Geert Uytterhoeven wrote:
> Hi Jon,
>
> On Fri, Mar 18, 2016 at 11:56 AM, Jon Hunter <jonathanh@xxxxxxxxxx> wrote:
>> On 18/03/16 10:52, Geert Uytterhoeven wrote:
>>> On Fri, Mar 18, 2016 at 11:13 AM, Jon Hunter <jonathanh@xxxxxxxxxx> wrote:
>>>> On 18/03/16 09:13, Geert Uytterhoeven wrote:
>>>>> On Thu, Mar 17, 2016 at 3:19 PM, Jon Hunter <jonathanh@xxxxxxxxxx> wrote:
>>>>>> Commit afbbd2338176 ("irqchip/gic: Document optional Clock and Power
>>>>>> Domain properties") documented optional clock and power-dmoain properties
>>>>>> for the ARM GIC. Currently, there are no users of these and for the
>>>>>> Tegra210 Audio GIC (based upon the GIC-400) there are two clocks, a
>>>>>> functional clock and interface clock, that need to be enabled.
>>>>>
>>>>> The reason that there are no users for this is twofold:
>>>>> 1. The GIC driver doesn't have Runtime PM support yet,
>>>>> 2. There was no clean way to prevent the GIC's clock from being disabled.
>>>>> Due to this, adding the clocks to the DTSes would mean that they will be
>>>>> disabled during boot up as unused clocks, leading to a system lock-up.
>>>>>
>>>>> I had hoped your series would fix part 1. I gave it a try on r8a7791/koelsch,
>>>>> but unfortunately it seems the platform driver only supports non-root
>>>>> controllers, while the r8a7791 GIC is the primary one...
>>>>
>>>> Can you try making the following change ...
>>>
>>> Thanks! I gave it a try, but no difference.
>>
>> I assume you added the appropriate compatible flag? Any more details you
>
> Doh... bad assumption... Silly me.
>
>> can share about why it is not working? Is it not registered early enough?
>
> With
>
> + { .compatible = "arm,gic-400", },
>
> the kernel no longer crashes due to accessing the GIC registers while the
> GIC module clock is disabled.
>
> However, the system doesn't boot completely, and time outs on SPI transfers
> make me believe interrupts are not working.
> Both with and without "the following change".
>
Is my assumption correct that you are trying to enable RPM for primary GIC controller?
If yes it may help to take a look on clocksource drivers which use early_platform_device/driver
sh_cmt.c sh_mtu2.c sh_tmu.c
The primary interrupt controller is initialized very early init_IRQ->irqchip_init->of_irq_init()
(IRQCHIP_DECLARE) and, at least as i can see from st_xxx code, the same case is valid for
clocksource devices and it was solved using early_platform_device/drive staff.
--
regards,
-grygorii
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