On Tue, 9 Feb 2016 11:13:48 +0300
Antony Pavlov <antonynpavlov@xxxxxxxxx> wrote:
> Signed-off-by: Antony Pavlov <antonynpavlov@xxxxxxxxx>
> Cc: Alban Bedel <albeu@xxxxxxx>
> Cc: Ralf Baechle <ralf@xxxxxxxxxxxxxx>
> Cc: linux-mips@xxxxxxxxxxxxxx
> Cc: devicetree@xxxxxxxxxxxxxxx
> ---
> Documentation/devicetree/bindings/clock/qca,ath79-pll.txt | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/clock/qca,ath79-pll.txt b/Documentation/devicetree/bindings/clock/qca,ath79-pll.txt
> index e0fc2c1..ae99f22 100644
> --- a/Documentation/devicetree/bindings/clock/qca,ath79-pll.txt
> +++ b/Documentation/devicetree/bindings/clock/qca,ath79-pll.txt
> @@ -3,7 +3,7 @@ Binding for Qualcomm Atheros AR7xxx/AR9XXX PLL controller
> The PPL controller provides the 3 main clocks of the SoC: CPU, DDR and AHB.
>
> Required Properties:
> -- compatible: has to be "qca,<soctype>-cpu-intc" and one of the following
> +- compatible: has to be "qca,<soctype>-pll" and one of the following
> fallbacks:
> - "qca,ar7100-pll"
> - "qca,ar7240-pll"
> @@ -21,7 +21,7 @@ Optional properties:
>
> Example:
>
> - memory-controller@18050000 {
> + pll-controller@18050000 {
> compatible = "qca,ar9132-ppl", "qca,ar9130-pll";
> reg = <0x18050000 0x20>;
>
Acked-by: Alban Bedel <albeu@xxxxxxx>
Alban
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