On 03/02/16 18:00, Will Deacon wrote: > The arm,gic-v3 binding was written with good intentions and doesn't > enforce interrupt-cells to be 3, therefore making it easy to extend > the irq description in future if necessary: > > > Cells 4 and beyond are reserved for future use. > > Unfortunately, this sentence is immediately followed up with: > > > When the 1st cell has a value of 0 or 1, cells 4 and beyond act as > > padding, and may be ignored. It is recommended that padding cells > > have a value of 0. > > Consequently, any extensions to the PPI or SPI interrupt specifiers must > be able to work with random crap from legacy DTs, effectively > necessitating a new interrupt type in the first cell. Sigh. > > This patch fixes the text so that additional, reserved cells are > required to be zero. This looks like a reasonable thing to require and > is already satisifed by the .dts files in-tree. > > Cc: Mark Rutland <mark.rutland@xxxxxxx> > Cc: Marc Zyngier <marc.zyngier@xxxxxxx> > Signed-off-by: Will Deacon <will.deacon@xxxxxxx> Acked-by: Marc Zyngier <marc.zyngier@xxxxxxx> M. -- Jazz is not dead. It just smells funny... -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
