On Mon, Feb 1, 2016 at 11:03 PM, Rob Herring <robh@xxxxxxxxxx> wrote: > On Sun, Jan 31, 2016 at 09:20:55AM +0800, Vishnu Patekar wrote: >> A83T has similar bus gates that of H3, including single gating register has >> different clock parent. >> >> As per H3 and A83T datasheet, usbhost is under AHB2. >> >> However,below shows allwinner source code assignment: >> bits: 26 (ehci0), 27 (ehci1), 29 (ohci0) => AHB1 for A83T. >> bits: 26 (ehci0), 27 (ehci1) => AHB1 for H3 >> bits 29, 30, 31(ohci0,1,2) => AHB2 for H3. >> >> until, this confusion is cleared keep it H3 way. >> >> Signed-off-by: Vishnu Patekar <vishnupatekar0510@xxxxxxxxx> >> --- >> Documentation/devicetree/bindings/clock/sunxi.txt | 1 + >> drivers/clk/sunxi/clk-sun8i-bus-gates.c | 2 ++ >> 2 files changed, 3 insertions(+) > > Acked-by: Rob Herring <robh@xxxxxxxxxx> Acked-by: Chen-Yu Tsai <wens@xxxxxxxx> We should really get the clk parents sorted out though. -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
