On 1/22/2016 4:56 AM, Rob Herring wrote:
On Thu, Jan 21, 2016 at 12:39:41PM +0530, Archit Taneja wrote:Add hdmi phy bindings. Update the example to use hdmi phy. Add a missing power-domains property in the hdmi core bindings. Cc: devicetree@xxxxxxxxxxxxxxx Cc: Rob Herring <robh@xxxxxxxxxx> Signed-off-by: Archit Taneja <architt@xxxxxxxxxxxxxx> --- .../devicetree/bindings/display/msm/hdmi.txt | 39 +++++++++++++++++++++- 1 file changed, 38 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/msm/hdmi.txt b/Documentation/devicetree/bindings/display/msm/hdmi.txt index 379ee2e..21590ee 100644 --- a/Documentation/devicetree/bindings/display/msm/hdmi.txt +++ b/Documentation/devicetree/bindings/display/msm/hdmi.txt @@ -11,6 +11,7 @@ Required properties: - reg: Physical base address and length of the controller's registers - reg-names: "core_physical" - interrupts: The interrupt signal from the hdmi block. +- power-domains: Should be <&mmcc MDSS_GDSC>. - clocks: device clocks See ../clocks/clock-bindings.txt for details. - qcom,hdmi-tx-ddc-clk-gpio: ddc clk pin @@ -18,6 +19,7 @@ Required properties: - qcom,hdmi-tx-hpd-gpio: hpd pin - core-vdda-supply: phandle to supply regulator - hdmi-mux-supply: phandle to mux regulator +- qcom,dsi-phy: phandle to HDMI PHY device nodedsi?
Sorry, this is a typo. It should be qcom,hdmi-phy.
Why does this not use the phy binding?
The PHY in the HDMI and DSI blocks can't be implemented using the common phy framework. The PHY blocks have a PLL sub-block within them which acts as a pixel clock source for the display processor block. This dependency causes the need to split the phy power on sequence into 2 parts (one to enable resources to enable the PLL, and the other to enable the phy itself), which the phy framework can't do. That's the main reason not to use it. There are some more complex use cases for DSI PHY (drive two PHYs with the same DSI PLL) which the phy framework can't support. Thanks, Archit
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