On Wed, Jan 20, 2016 at 06:07:16PM +0000, Mans Rullgard wrote:
> This adds a binding for the secondary interrupt controller in
> Sigma Designs SMP86xx and SMP87xx chips.
>
> Signed-off-by: Mans Rullgard <mans@xxxxxxxxx>
> ---
> Changes:
> - not included in v3
> ---
> .../interrupt-controller/sigma,smp8642-intc.txt | 49 ++++++++++++++++++++++
> 1 file changed, 49 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/interrupt-controller/sigma,smp8642-intc.txt
>
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/sigma,smp8642-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/sigma,smp8642-intc.txt
> new file mode 100644
> index 000000000000..2643f3466091
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/interrupt-controller/sigma,smp8642-intc.txt
> @@ -0,0 +1,49 @@
> +Sigma Designs SMP86xx/SMP87xx secondary interrupt controller
> +
> +Required properties:
> +- compatible: should be "sigma,smp8642-intc"
> +- reg: physical address of MMIO region
> +- ranges: address space mapping of child nodes
> +- interrupt-parent: phandle of parent interrupt controller
> +- interrupt-controller: boolean
> +- #address-cells: should be <1>
> +- #size-cells: should be <1>
> +
> +One child node per control block with properties:
> +- reg: address of registers for this control block
> +- interrupt-controller: boolean
> +- #interrupt-cells: should be <2>, interrupt index and flags per interrupts.txt
> +- interrupts: interrupt spec of primary interrupt controller
> +
> +Example:
> +
> +interrupt-controller@6e000 {
> + compatible = "sigma,smp8642-intc";
> + reg = <0x6e000 0x400>;
> + ranges = <0x0 0x6e000 0x400>;
> + interrupt-parent = <&gic>;
> + interrupt-controller;
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + irq0: irq0 {
Keeping with generic names, this should be interrupt-controller@0 (and
100, 300).
Otherwise,
Acked-by: Rob Herring <robh@xxxxxxxxxx>
> + reg = <0x000 0x100>;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +
> + irq1: irq1 {
> + reg = <0x100 0x100>;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +
> + irq2: irq2 {
> + reg = <0x300 0x100>;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +};
> --
> 2.7.0
>
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