Dear Jisheng Zhang, On Wed, 20 Jan 2016 16:06:21 +0800, Jisheng Zhang wrote: > Some platforms may provide more than one clk for the mvneta IP, for > example Marvell BG4CT provides "core" clk for the mac core, and "axi" > clk for the AXI bus logic. > > To support for more than one clock, we'll need to distinguish between > the clock by name. Change clock probing to first try to get "core" > clock before falling back to unnamed clock. > > Signed-off-by: Jisheng Zhang <jszhang@xxxxxxxxxxx> > --- > drivers/net/ethernet/marvell/mvneta.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) Acked-by: Thomas Petazzoni <thomas.petazzoni@xxxxxxxxxxxxxxxxxx> Thanks, Thomas -- Thomas Petazzoni, CTO, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
