LPC32xx SoC has two independent PWM controllers, they have different
clock parents, clock gates and slightly different controls, each of
these two PWM controllers has one output channel.
The change updates device tree binding documentation to reflect two PWM
devices.
Signed-off-by: Vladimir Zapolskiy <vz@xxxxxxxxx>
---
Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt b/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt
index cfe1db3..ab0907d 100644
--- a/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt
+++ b/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt
@@ -8,5 +8,10 @@ Examples:
pwm@0x4005C000 {
compatible = "nxp,lpc3220-pwm";
- reg = <0x4005C000 0x8>;
+ reg = <0x4005C000 0x4>;
+};
+
+pwm@0x4005C004 {
+ compatible = "nxp,lpc3220-pwm";
+ reg = <0x4005C004 0x4>;
};
--
2.1.4
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