On Thu, Dec 03, 2015 at 03:38:12PM -0600, Rob Herring wrote: > On Thu, Dec 03, 2015 at 12:02:20PM +0000, Harvey Hunt wrote: > > v8 -> v9: > > - Document that partitions are represented as a child node of a NAND chip. > > Don't multiple flash chips typically get interleaved in order to get > parallelism needed for performance? Then the view of the partitions > would apply across all chips. Not in MTD so far. We have mtdconcat to do some combination of flash, but it's not too easy to use right now. There are also some "MTD RAID" patches submitted recently that might cover what you're talking about, but that's brand new and unreviewed, and I don't think anyone has considered trying to handle partitions for such a thing yet. Partitioning of this kind isn't even that useful for NAND flash, actually, since fixed assignment of flash ranges restricts the flexibility of UBI's wear-leveling algorithms. It probably makes more sense to deal with UBI volumes instead of MTD partitions when talking about NAND flash. And those aren't specified in DT. > Anyway, it's optional, so: > > Acked-by: Rob Herring <robh@xxxxxxxxxx> Brian -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
