+ Broadcom list + Kamal
On Tue, Nov 24, 2015 at 08:19:37PM -0000, Simon Arlott wrote:
> Add device tree binding for NAND on the BCM63268.
>
> The BCM63268 has a NAND interrupt register with combined status and enable
> registers.
>
> Signed-off-by: Simon Arlott <simon@xxxxxxxxxxx>
> ---
> .../devicetree/bindings/mtd/brcm,brcmnand.txt | 35 ++++++++++++++++++++++
> 1 file changed, 35 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
> b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
> index 4ff7128..f2a71c8 100644
> --- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
> +++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
> @@ -72,6 +72,14 @@ we define additional 'compatible' properties and associated register resources w
> and enable registers
> - reg-names: (required) "nand-int-base"
>
> + * "brcm,nand-bcm63268"
> + - compatible: should contain "brcm,nand-bcm<soc>", "brcm,nand-bcm63268"
Looks like you're aiming to support bcm63168? Is bcm63268 the first
chip to include this style of register then? The numbering seems
backwards, but that may just be reality.
> + - reg: (required) the 'NAND_INTR_BASE' register range, with combined status
> + and enable registers, and boot address registers
> + - reg-names: (required) "nand-intr-base"
> + - clock: (required) reference to the clock for the NAND controller
> + - clock-names: (required) "nand"
> +
> * "brcm,nand-iproc"
> - reg: (required) the "IDM" register range, for interrupt enable and APB
> bus access endianness configuration, and the "EXT" register range,
> @@ -148,3 +156,30 @@ nand@f0442800 {
> };
> };
> };
> +
> +nand@10000200 {
> + compatible = "brcm,nand-bcm63168", "brcm,nand-bcm63268",
> + "brcm,brcmnand-v4.0", "brcm,brcmnand";
> + reg = <0x10000200 0x180>,
> + <0x10000600 0x200>,
> + <0x100000b0 0x10>;
> + reg-names = "nand", "nand-cache", "nand-intr-base";
> + interrupt-parent = <&periph_intc>;
> + interrupts = <50>;
> + clocks = <&periph_clk 20>;
> + clock-names = "nand";
> +
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + nand0: nandcs@0 {
> + compatible = "brcm,nandcs";
> + reg = <0>;
> + nand-on-flash-bbt;
> + nand-ecc-strength = <1>;
> + nand-ecc-step-size = <512>;
> +
> + #address-cells = <0>;
> + #size-cells = <0>;
What are these {address,size}-cells for? If you need them for
partitioning, then those are wrong -- they shouldn't be zero. Maybe just
drop them? (I can cut them out when applying, if that's the only change
to make.)
> + };
> +};
Brian
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