Add device tree binding for the BCM63xx soft reset controller.
The BCM63xx contains a soft-reset controller activated by setting
a bit (that must previously have cleared).
Signed-off-by: Simon Arlott <simon@xxxxxxxxxxx>
---
.../bindings/reset/brcm,bcm63xx-reset.txt | 37 ++++++++++++++++++++++
1 file changed, 37 insertions(+)
create mode 100644 Documentation/devicetree/bindings/reset/brcm,bcm63xx-reset.txt
diff --git a/Documentation/devicetree/bindings/reset/brcm,bcm63xx-reset.txt b/Documentation/devicetree/bindings/reset/brcm,bcm63xx-reset.txt
new file mode 100644
index 0000000..48e9daf
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/brcm,bcm63xx-reset.txt
@@ -0,0 +1,37 @@
+BCM63xx reset controller
+
+The BCM63xx contains a basic soft reset controller in the perf register
+set which resets components using a bit in a register.
+
+Please also refer to reset.txt in this directory for common reset
+controller binding usage.
+
+Required properties:
+- compatible: Should be "brcm,bcm<soc>-reset", "brcm,bcm63xx-reset"
+- regmap: The register map phandle
+- offset: Offset in the register map for the reset register (in bytes)
+- #reset-cells: Must be set to 1
+
+Optional properties:
+- mask: Mask of valid reset bits in the reset register (32 bit access)
+ (Defaults to all bits)
+
+Example:
+
+periph_soft_rst: reset-controller {
+ compatible = "brcm,bcm63168-reset", "brcm,bcm63xx-reset";
+ regmap = <&periph_cntl>;
+ offset = <0x10>;
+
+ #reset-cells = <1>;
+};
+
+usbh: usbphy@10002700 {
+ compatible = "brcm,bcm63168-usbh";
+ reg = <0x10002700 0x38>;
+ clocks = <&periph_clk 13>, <&timer_clk 18>;
+ resets = <&periph_soft_rst 6>;
+ power-supply = <&power_usbh>;
+ #phy-cells = <0>;
+};
+
--
2.1.4
--
Simon Arlott
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