[PATCH 06/10] arm: dts: lpc32xx: add description of IC wakeup controllers

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The change adds System Control Block simple bus device tree node and
populates it with two first subdevices, wakeup controllers connected
to LPC32xx interrupt controllers MIC, SIC1 and SIC2.

The change also assigns a name to MIC controller and set its wakeup
sources.

Signed-off-by: Vladimir Zapolskiy <vz@xxxxxxxxx>
---
 arch/arm/boot/dts/lpc32xx.dtsi | 18 +++++++++++++++++-
 1 file changed, 17 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/lpc32xx.dtsi b/arch/arm/boot/dts/lpc32xx.dtsi
index fbf1984b..b2735dd 100644
--- a/arch/arm/boot/dts/lpc32xx.dtsi
+++ b/arch/arm/boot/dts/lpc32xx.dtsi
@@ -295,6 +295,18 @@
 					clocks = <&xtal_32k>, <&xtal>;
 					clock-names = "xtal_32k", "xtal";
 				};
+
+				wakeup_int: wakeup-controller@20 {
+					compatible = "nxp,lpc3220-wakeup";
+					reg = <0x20 0x10>;
+					#wakeup-cells = <2>;
+				};
+
+				wakeup_pin: wakeup-controller@30 {
+					compatible = "nxp,lpc3220-wakeup";
+					reg = <0x30 0x10>;
+					#wakeup-cells = <2>;
+				};
 			};
 
 			/*
@@ -305,9 +317,13 @@
 			 */
 			mic: interrupt-controller@40008000 {
 				compatible = "nxp,lpc3220-mic";
-				interrupt-controller;
 				reg = <0x40008000 0xC000>;
+				interrupt-controller;
+				interrupt-controller-name = "mic";
 				#interrupt-cells = <2>;
+
+				wakeup-sources = <&wakeup_int 7 29>,
+						 <&wakeup_int 25 27>;
 			};
 
 			uart1: serial@40014000 {
-- 
2.1.4

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