Amend the DT bindings to include the optional external clock on
(H)SCI(F) and some SCIFA, where this pin can serve as a clock input,
depending on board wiring.
Signed-off-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
Cc: devicetree@xxxxxxxxxxxxxxx
---
Documentation/devicetree/bindings/serial/renesas,sci-serial.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
index 2c9e6b8477e92792..8efc9b6f35637fbb 100644
--- a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
+++ b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
@@ -43,6 +43,9 @@ Required properties:
- clocks: Must contain a phandle and clock-specifier pair for each entry
in clock-names.
- clock-names: Must contain "fck" for the SCIx UART functional clock.
+ On (H)SCI(F) and some SCIFA, an additional clock may be specified:
+ - "hsck" for the optional external clock input (on HSCIF),
+ - "sck" for the optional external clock input (on other variants).
Note: Each enabled SCIx UART should have an alias correctly numbered in the
"aliases" node.
--
1.9.1
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