Fu Wei wrote:
SBSA 2.3 Page 23 :
Note: the watchdog offset register is 32 bits wide. This gives a
maximum watch period of around 10s at a system
counter frequency of 400MHz. If a larger watch period is required then
the compare value can be programmed
directly into the compare value register.
214s means your system counter is approximately at 20MHz which is in
the range of (10MHz ~ 400MHz)
SBSA 2.3 Page 13 :
The System Counter (of the Generic Timer) shall run at a minimum
frequency of 10MHz and maximum of
400MHz.
Thanks, that explains a lot.
If we expected customers to have a lower system counter frequency, then
we wouldn't have to worry about the timeouts being too short. It seems
to me that the SBSA spec says that if you want a longer timeout, you
have to lower the frequency. We shouldn't be complicating the driver
because some customers might not follow the spec.
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