On Tue, Oct 27, 2015 at 11:10 PM, Fu Wei <fu.wei@xxxxxxxxxx> wrote: > >> Why is WS1 optional? > > According to the description of WS1 in SBSA 2.3 (5.2 Watchdog Operation) page 21 > ----------------- > The signal is fed to a higher agent as an interrupt or reset for it to > take executive action. > ---------------- > > So WS1 maybe a interrupt. > > In a real Hardware, WS1 hooks to a reset signal pin of BMC, if this > pin is triggered, BMC will do a real warm reset. > In this case, WS1 is a reset, Linux doesn't need to deal with that. > > For now , I haven't found a hardware use WS1 as interrupt. > In <ARM v8-A Foundation Platform User Guide> 3.2 Interrupt maps Page 22 > Table 3-3 Shared peripheral interrupt assignments > IRQ ID SPI offset Device > 60 28 EL2 Generic Watchdog WS1 > > But I don't have further info about it. > > Anyway, because this signal could be interrupt or reset, Linux don't > need know this signal sometimes. > So I think it should be optional in binding info. > > Do I miss something? Any suggestion ? Please correct me, thanks. I think maybe Mark was asking why WS1 is optional, not the WS1 interrupt. Maybe you can reword the documentation to make is clear that only the *interrupt* for WS1 is optional. However, the ACPI table only allows for one interrupt, and it's not clear whether that's the WS0 or WS1 interrupt. So if both WS0 and WS1 generate an interrupt, how does the driver handle that? -- Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project. -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
