Enable pinctrl for phycore devices.
Signed-off-by: Markus Pargmann <mpa@xxxxxxxxxxxxxx>
Acked-by: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>
---
arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts | 2 ++
arch/arm/boot/dts/imx27-phytec-phycore-som.dts | 6 ++++++
2 files changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts b/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
index 0fc6551..9bedd2f 100644
--- a/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
+++ b/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
@@ -33,6 +33,8 @@
&uart2 {
fsl,uart-has-rtscts;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2_1 &pinctrl_uart2_rtscts_1>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx27-phytec-phycore-som.dts b/arch/arm/boot/dts/imx27-phytec-phycore-som.dts
index 4ec402c..3dbdb5e 100644
--- a/arch/arm/boot/dts/imx27-phytec-phycore-som.dts
+++ b/arch/arm/boot/dts/imx27-phytec-phycore-som.dts
@@ -135,11 +135,15 @@
&fec {
phy-reset-gpios = <&gpio3 30 0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_fec1_1>;
status = "okay";
};
&i2c2 {
clock-frequency = <400000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2_1>;
status = "okay";
at24@52 {
@@ -166,6 +170,8 @@
};
&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1_1 &pinctrl_uart1_rtscts_1>;
status = "okay";
};
--
1.8.4.rc3
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