The clock assignment in the device tree for GPIO block 8 was
incorrect, indicating this was managed by bit 1 on PRCC 6
while it was in fact bit 1 on PRCC 5.
Cc: Lee Jones <lee.jones@xxxxxxxxxx>
Signed-off-by: Linus Walleij <linus.walleij@xxxxxxxxxx>
---
arch/arm/boot/dts/ste-dbx5x0.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/ste-dbx5x0.dtsi b/arch/arm/boot/dts/ste-dbx5x0.dtsi
index 2ef30c1..55abf12 100644
--- a/arch/arm/boot/dts/ste-dbx5x0.dtsi
+++ b/arch/arm/boot/dts/ste-dbx5x0.dtsi
@@ -227,7 +227,7 @@
#gpio-cells = <2>;
gpio-bank = <8>;
- clocks = <&prcc_pclk 6 1>;
+ clocks = <&prcc_pclk 5 1>;
};
pinctrl {
--
1.8.3.1
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