From: J Keerthy <j-keerthy@xxxxxx>
This patch changes apll_pcie_m2_ck to fixed factor
clock as there are no configurable divider associated to m2.
Signed-off-by: J Keerthy <j-keerthy@xxxxxx>
Signed-off-by: Tero Kristo <t-kristo@xxxxxx>
Tested-by: Nishanth Menon <nm@xxxxxx>
Acked-by: Tony Lindgren <tony@xxxxxxxxxxx>
---
arch/arm/boot/dts/dra7xx-clocks.dtsi | 9 +++------
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi b/arch/arm/boot/dts/dra7xx-clocks.dtsi
index c830e15..75d5e1b 100644
--- a/arch/arm/boot/dts/dra7xx-clocks.dtsi
+++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi
@@ -348,13 +348,10 @@ apll_pcie_clkvcoldo_div: apll_pcie_clkvcoldo_div {
apll_pcie_m2_ck: apll_pcie_m2_ck@4a008224 {
#clock-cells = <0>;
- compatible = "ti,divider-clock";
+ compatible = "fixed-factor-clock";
clocks = <&apll_pcie_ck>;
- ti,max-div = <127>;
- ti,autoidle-shift = <8>;
- reg = <0x4a008224 0x4>;
- ti,index-starts-at-one;
- ti,autoidle-low;
+ clock-mult = <1>;
+ clock-div = <1>;
};
sys_clk1_dclk_div: sys_clk1_dclk_div@4ae061c8 {
--
1.7.9.5
--
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