On 30/09/13 14:59, Sricharan R wrote: > In some socs the gic can be preceded by a crossbar IP which > routes the peripheral interrupts to the gic inputs. The peripheral > interrupts are associated with a fixed crossbar input line and the > crossbar routes that to one of the free gic input line. > > The DT entries for peripherals provides the fixed crossbar input line > as its interrupt number and the mapping code should associate this with > a free gic input line. This patch adds the support inside the gic irqchip > to handle such routable irqs. The routable irqs are registered in a linear > domain. The registered routable domain's callback should be implemented > to get a free irq and to configure the IP to route it. Isn't this just another chained interrupt controller? How is it GIC specific? M. -- Jazz is not dead. It just smells funny... -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
