On Thu, Sep 26, 2013 at 11:35:43PM +0200, Linus Walleij wrote: > On Thu, Sep 26, 2013 at 10:29 PM, Fabio Estevam <festevam@xxxxxxxxx> wrote: > > On Thu, Sep 26, 2013 at 4:51 PM, Russell King - ARM Linux > > >> I mean the stuff which looks like this: > >> > >> #define MX6QDL_PAD_ENET_MDC__ESAI_TX5_RX0 0x1e8 0x5b8 0x858 0x2 0x0 > > > > Let me try to decode it: > > > > 0x1e8: Offset of IOMUXC_SW_MUX_CTL_PAD_ENET_MDC register > > > > 0x5b8: Offset of IOMUXC_SW_PAD_CTL_PAD_ENET_MDC register > > > > 0x2: This means that the MUX_MODE field selects the ESAI_TX5_RX0 function > > in this pad > > > > 0x0: SELECT_INPUT not used for this pad > > This I guess predates the inctroduction of defines into the DTC, > but we can do a lot better now. > > Can someone from the i.MX camp take a sweep and convert this > to defines in some include/dt-bindings/imx.h or similar file so > this thing becomes readable? We call those macros like MX6QDL_PAD_ENET_MDC__ESAI_TX5_RX0 in imx6q-pinfunc.h pin function ID. It's all about choosing a pinmux function (ESAI_TX5_RX0) for given pad (MX6QDL_PAD_ENET_MDC), and that's all what users care and need to read from the macro. The decoding of the macro is the register details that users do not care in general. But fsl,pinctrl bindings doc documented these details anyway. Shawn -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html