On Tue, Sep 17, 2013 at 12:26:02PM +0300, jsarha@xxxxxx wrote: > From: Jyri Sarha <jsarha@xxxxxx> > > This patch adds DMA register location to mcasp DT bindings. On am33xx > SoCs the McASP registers are mapped trough L4 interconnect, which is > not accessible by the DMA controller, so McASP data port is mapped > trough L3 to a different location. Looks good to me but again you ought to CC the DT maintainers directly.
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