> > +- fsl,pwm-counter-clk: The FTM PWM counter clock source, should be > > +one of the > > + entries in clock-names. > > So the IP block has 3 input clocks, and also a mux to select which one to > use? That sounds slightly unusual, but possible. > > If there is really only 1 clock input to the IP block, and the mux is > part of some other module, then this binding should have only 1 entry in > clocks. > Yes, there are 3 input clocks that can be selectable, and the mux is inside the FTM IP block. Thanks. -- Best Regard, Xiubo -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
