于 2013年09月11日 18:41, Mark Brown 写道: > So why does the SPI driver have references to the opcodes in it? I admit that the Freescale's quadspi controller is very special (it is designed too coupled with the SPI Nor FLASH), it is driven by the LUT registers. I just quote the comment from the patch 1: ------------------------------------------------------------- (2) The definition of the LUT register shows below: --------------------------------------------------- | INSTR1 | PAD1 | OPRND1 | INSTR0 | PAD0 | OPRND0 | --------------------------------------------------- There are several types of INSTRx, such as: CMD : the SPI NOR command. ADDR : the address for the SPI NOR command. DUMMY : the dummy cycles needed by the SPI NOR command. .... ------------------------------------------------------------------- The LUT registers needs to be filled with the SPI NOR command, such Fast-read/Quad-read. So the Quadspi driver needs to know the spi commands, and that's why the SPI driver has references to the spi command opcodes. thanks Huang Shijie -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
