Fix phy0 address to match the reg property defined in phy0 node.
Signed-off-by: Boris BREZILLON <b.brezillon@xxxxxxxxxxx>
Acked-by: Nicolas Ferre <nicolas.ferre@xxxxxxxxx>
---
Changes since v1:
- better commit message
arch/arm/boot/dts/sama5d3xmb.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sama5d3xmb.dtsi b/arch/arm/boot/dts/sama5d3xmb.dtsi
index e9521d5..dba739b 100644
--- a/arch/arm/boot/dts/sama5d3xmb.dtsi
+++ b/arch/arm/boot/dts/sama5d3xmb.dtsi
@@ -84,7 +84,7 @@
#address-cells = <1>;
#size-cells = <0>;
- phy0: ethernet-phy@0 {
+ phy0: ethernet-phy@1 {
interrupt-parent = <&pioE>;
interrupts = <30 IRQ_TYPE_EDGE_FALLING>;
reg = <1>;
--
1.7.9.5
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