Add spi-tx-nbits and spi-rx-nbits for spi slave node. spi-tx-nbits:Number of bits used for MOSI(writting) spi-rx-nbits:Number of bits used for MISO(reading) Support for spi-tx/rx-nbits in SPI framework has been picked[1]. [1]: http://comments.gmane.org/gmane.linux.kernel.spi.devel/14420 Commit Id:f477b7fb13df2b843997559ff34e87d054ba6538 Signed-off-by: wangyuhang <wangyuhang2014@xxxxxxxxx> --- Documentation/devicetree/bindings/spi/spi-bus.txt | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/Documentation/devicetree/bindings/spi/spi-bus.txt b/Documentation/devicetree/bindings/spi/spi-bus.txt index 296015e..145ba96 100644 --- a/Documentation/devicetree/bindings/spi/spi-bus.txt +++ b/Documentation/devicetree/bindings/spi/spi-bus.txt @@ -55,6 +55,20 @@ contain the following properties. chip select active high - spi-3wire - (optional) Empty property indicating device requires 3-wire mode. +- spi-tx-nbits - (optional) Number of bits used for MOSI(writting) +- spi-rx-nbits - (optional) Number of bits used for MISO(reading) + +So if for example the slave has 4 wires for writting and 2 wires for reading, +and the spi-tx/rx-nbits property should be set as follows: + +spi-tx-nbits = <4>; +spi-rx-nbits = <2>; + +Now the value that spi-tx-nbits and spi-rx-nbits can receive is only +1(single), 2(dual) and 4(quad). If you don't set spi-tx-nbits or spi-rx-nbits, +spi_device mode will be set in single(1 wire) as default. Another point, if +property:spi-3wire is set, spi-tx/rx-nbits is forbidden to set to <2 or 4>, +otherwise, an errro will return. If a gpio chipselect is used for the SPI slave the gpio number will be passed via the cs_gpio -- 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
