On Thu, Aug 22, 2013 at 02:55:42AM +0000, Xiubo Li-B47053 wrote: > Hi Tomasz, > > Thanks for your comments. > > > > Could you explain meaning of this property more precisely? I'm interested > > especially how is this related to the PWM IP block and boards. > > > > Yes. > There are 8 channels most. While the pinctrls of 4th and 5th channels could be > used by uart's Rx and Tx, then these 2 channels won't be used for pwm output, > so there will be 6 channels available by the pwm. > Thus, the pwm chip will register only 6 pwms(6 channels) most("fsl,pwm-channel-orders > = {0 1 2 3 6 7}").And also the "fsl,pwm-channel-number" will be 6. If the chip has eight PWMs I would register all of them. If some of them are not routed out by the pinmux then just nothing happens if you use them. In a sane devicetree they won't be referenced anyway when they are not routed out of the SoC. Sascha -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html