Re: [PATCH v5 02/13] [media] exynos5-fimc-is: Add Exynos5 FIMC-IS device tree bindings documentation

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Hi Sylwester,

On Thu, Aug 15, 2013 at 8:39 PM, Sylwester Nawrocki
<sylvester.nawrocki@xxxxxxxxx> wrote:
> W dniu 2013-08-14 06:46, Arun Kumar K pisze:
>
>> The patch adds the DT binding documentation for Samsung
>> Exynos5 SoC series imaging subsystem (FIMC-IS).
>>
>> Signed-off-by: Arun Kumar K <arun.kk@xxxxxxxxxxx>
>> Reviewed-by: Sylwester Nawrocki <s.nawrocki@xxxxxxxxxxx>
>> ---
>>   .../devicetree/bindings/media/exynos5-fimc-is.txt  |   47
>> ++++++++++++++++++++
>>   1 file changed, 47 insertions(+)
>>   create mode 100644
>> Documentation/devicetree/bindings/media/exynos5-fimc-is.txt
>>
>> diff --git a/Documentation/devicetree/bindings/media/exynos5-fimc-is.txt
>> b/Documentation/devicetree/bindings/media/exynos5-fimc-is.txt
>> new file mode 100644
>> index 0000000..bfd36df
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/media/exynos5-fimc-is.txt
>> @@ -0,0 +1,47 @@
>> +Samsung EXYNOS5 SoC series Imaging Subsystem (FIMC-IS)
>> +------------------------------------------------------
>> +
>> +The camera subsystem on Samsung Exynos5 SoC has some changes relative
>> +to previous SoC versions. Exynos5 has almost similar MIPI-CSIS and
>> +FIMC-LITE IPs but has a much improved version of FIMC-IS which can
>> +handle sensor controls and camera post-processing operations. The
>> +Exynos5 FIMC-IS has a dedicated ARM Cortex A5 processor, many
>> +post-processing blocks (ISP, DRC, FD, ODC, DIS, 3DNR) and two
>> +dedicated scalers (SCC and SCP).
>> +
>> +fimc-is node
>> +------------
>> +
>> +Required properties:
>> +
>> +- compatible        : must be "samsung,exynos5250-fimc-is"
>> +- reg               : physical base address and size of the memory mapped
>> +                      registers
>> +- interrupt-parent  : parent interrupt controller
>> +- interrupts        : fimc-is interrupt to the parent combiner
>
>
> Is it really only one interrupt or two as in case of Exynos4x12 ?
> Also it's probably more appropriate to say "interrupt controller"
> instead of "combiner", not including details of the the FIMC-IS external
> interrupt controller in this binding.
>

It needs only one interrupt and that is the one from A5 to main ARM processor.
Will change it to controller.

>
>> +- clocks            : list of clock specifiers, corresponding to entries
>> in
>> +                      clock-names property;
>> +- clock-names       : must contain "isp", "mcu_isp", "isp_div0",
>> "isp_div1",
>> +                      "isp_divmpwm", "mcu_isp_div0", "mcu_isp_div1"
>> entries,
>> +                      matching entries in the clocks property.
>> +- pmu               : phandle to the fimc-is pmu node describing the
>> register
>> +                      base and size for FIMC-IS PMU.
>
>
> This property needs to be prefixed with "samsung,".
>

Ok

Regards
Arun
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