Dear Sebastian Hesselbarth, On Tue, 13 Aug 2013 14:25:19 +0200, Sebastian Hesselbarth wrote: > This patch set adds support for the PCIe controllers found on Marvell > Dove SoCs. It depends on mvebu-pci patches sent by Thomas Petazzoni. > The ARM Dove related patches have already been taken by Jason Cooper > and have been removed from v2 of this patch set. Changelog is added > to the individual patch emails. > > Patches 1 and 2 fix some minor issues with pci-mvebu by moving > clk_prepare_enable before accessing any controller registers and > counting sucessfully registered ports only. > > Patch 3 converts pci-mvebu from subsys_initcall registration to > normal platform driver registration to allow it to fail with > EPROBE_DEFER later. > > Patch 4 adds DT parsing for reset (PERST#) GPIO pins and delay to > wait for PCIe devices after reset de-assertion. > > Patch 5 finally adds a compatible to pci-mvebu for Dove SoCs. > > [Patch 6-9 have already been taken by Jason Cooper] > > Sebastian Hesselbarth (5): > PCI: mvebu: move clock enable before register access > PCI: mvebu: increment nports only for registered ports > PCI: mvebu: remove subsys_initcall > PCI: mvebu: add support for reset on GPIO > PCI: mvebu: add support for Marvell Dove SoCs I've just seen that Jason Cooper has already sent the PR for this code, but anyway, I just tested mvebu/for-next on my Armada XP GP board, and the PCIe + MSI continues to work nicely, even with your code integrated. So: Tested-by: Thomas Petazzoni <thomas.petazzoni@xxxxxxxxxxxxxxxxxx> Thanks, Thomas -- Thomas Petazzoni, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
