On Aug 8, 2013, at 9:19 AM, John Crispin wrote:
> Describe gpio-falcon binding.
Would be good to have a little more description in the commit message about which SoC this is associated with.
>
> Signed-off-by: John Crispin <blogic@xxxxxxxxxxx>
> Cc: linux-mips@xxxxxxxxxxxxxx
> Cc: devicetree@xxxxxxxxxxxxxxx
> Cc: linux-gpio@xxxxxxxxxxxxxxx
> ---
> .../devicetree/bindings/gpio/gpio-falcon.txt | 25 ++++++++++++++++++++
> 1 file changed, 25 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/gpio/gpio-falcon.txt
>
> diff --git a/Documentation/devicetree/bindings/gpio/gpio-falcon.txt b/Documentation/devicetree/bindings/gpio/gpio-falcon.txt
> new file mode 100644
> index 0000000..60bc6cd
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/gpio/gpio-falcon.txt
> @@ -0,0 +1,25 @@
> +Lantiq Falon SoC GPIO controller bindings
> +
> +Required properties:
> +- compatible:
> + - "lantiq,falcon-gpio" for Falcon SoC controllers
> +- #gpio-cells : Should be two.
> + - first cell is the pin number
> + - second cell is used to specify optional parameters (unused)
> +- gpio-controller : Marks the device node as a GPIO controller
> +- reg : Physical base address and length of the controller's registers
> +- interrupt-parent: phandle to the IM device node that the irq is routed via
> +- interrupts : Specify the IM interrupt number
> +- lantiq,bank : The physical GPIO bank that this block is assiciated with
spelling w/assiciated
> +
> +Example:
> +
> + gpio0: gpio@810000 {
> + compatible = "lantiq,falcon-gpio";
> + #gpio-cells = <2>;
> + gpio-controller;
> + reg = <0x810000 0x80>;
> + interrupt-parent = <&icu0>;
> + interrupts = <44>;
> + lantiq,bank = <0>;
> + };
- k
> --
> 1.7.10.4
>
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