On Fri, Aug 02, 2013 at 12:38:24PM +0200, Markus Pargmann wrote:
> Signed-off-by: Markus Pargmann <mpa@xxxxxxxxxxxxxx>
> ---
> .../bindings/pinctrl/fsl,imx27-pinctrl.txt | 53 +++
> drivers/pinctrl/Kconfig | 8 +
> drivers/pinctrl/Makefile | 1 +
> drivers/pinctrl/pinctrl-imx27.c | 477 +++++++++++++++++++++
> 4 files changed, 539 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,imx27-pinctrl.txt
> create mode 100644 drivers/pinctrl/pinctrl-imx27.c
>
> diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx27-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx27-pinctrl.txt
> new file mode 100644
> index 0000000..3352d94
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx27-pinctrl.txt
> @@ -0,0 +1,53 @@
> +* Freescale IMX27 IOMUX Controller
> +
> +Please refer to fsl,imx-pinctrl.txt in this directory for common binding part
> +and usage.
> +
> +The iomuxc driver node can have pin configuration and gpio subnodes. gpio
> +nodes defined as childs will share the registers with the iomuxc driver.
> +Please have a look into
> +Documentation/devicetree/bindings/gpio/fsl-imx-gpio.txt for information about
> +the gpio properties.
> +
> +Required properties:
> +- compatible: "fsl,imx27-iomuxc"
> +
> +Required properties for pin configuration node:
> +- fsl,pins: three integers array, represents a group of pins mux and config
> + setting. The format is fsl,pins = <PIN MUX_ID CONFIG>. PIN and MUX_ID are
Neither here nor imx27-pinfunc.h is PIN documented clearly. Also,
imx27-pinfunc.h names MUX_CONFIG for what we name MUX_ID here.
Shawn
> + defined as macros in arch/arm/boot/dts/imx27-pinfunc.h. CONFIG can be 0 or
> + 1, meaning Pullup disable/enable.
> +
> +Example:
> +
> +iomuxc: iomuxc@10015000 {
> + compatible = "fsl,imx27-iomuxc";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x10015000 0x600>;
> +
> + gpio1: gpio@10015000 {
> + compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
> + reg = <0x10015000>;
> + interrupts = <8>;
> + gpio-controller;
> + #gpio-cells = <2>;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + ...
> +
> + uart {
> + pinctrl_uart1: uart-1 {
> + fsl,pins = <
> + MX27_PAD_UART1_TXD__UART1_TXD 0x0
> + MX27_PAD_UART1_RXD__UART1_RXD 0x0
> + MX27_PAD_UART1_CTS__UART1_CTS 0x0
> + MX27_PAD_UART1_RTS__UART1_RTS 0x0
> + >;
> + };
> +
> + ...
> + };
> +};
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