On Wed, Mar 21, 2018 at 11:07 AM, David Gibson <david@xxxxxxxxxxxxxxxxxxxxx> wrote: > On Tue, Mar 20, 2018 at 03:54:08AM -0500, Rob Herring wrote: >> Having a 'bus-range' property for PCI bridges should not be required, > > Hmm. Shouldn't it? I thought it was a required property, but I'm > having trouble interpreting the information in the PCI binding > document to confirm that. Linux prints a message about the property not being there for the host bridge node, but I believe that was meant to be informational rather than a warning. The original PCI binding never had this property because it expected the buses to be assigned by OF before we got into the kernel. The problem we ran into with the dtc warning is when it warning about child nodes of the pci host bridge on Marvell and Nvidia platforms. These are device_type="pci" and correspond to a pcie root port, but should get the bus numbers assigned dynamically. One patch got applied to the kernel to set all bus ranges for marvell to 1-255 for each port, but that's obviously nonsense, because they should really be non-overlapping within one domain. We could in theory have a check to enforce non-overlapping bus ranges on pcie bridge nodes, with each one being within the range of the parent node, but as this is such a rare case, leaving out the warning seems easier. I just want to prevent the warning from causing other people to actively add wrong properties. Arnd -- To unsubscribe from this list: send the line "unsubscribe devicetree-compiler" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html