Re: [PATCH v2] cpufreq: powerpc: add cpufreq transition latency for FSL e500mc Socs

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



On 18 March 2014 11:11, Zhuoyu Zhang <Zhuoyu.Zhang@xxxxxxxxxxxxx> wrote:
> According to the data provided by HW Team, at least 12 internal platform
> clock cycles are required to stabilize a DFS clock switch on FSL e500mc Socs.
> This patch replaces the CPUFREQ_ETERNAL with appropriate HW clock transition
> latency to make DFS governors work normally on Freescale e500mc boards.
>
> Signed-off-by: Zhuoyu Zhang <Zhuoyu.Zhang@xxxxxxxxxxxxx>
> ---
>  drivers/cpufreq/ppc-corenet-cpufreq.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/cpufreq/ppc-corenet-cpufreq.c b/drivers/cpufreq/ppc-corenet-cpufreq.c
> index 051000f..5977f57 100644
> --- a/drivers/cpufreq/ppc-corenet-cpufreq.c
> +++ b/drivers/cpufreq/ppc-corenet-cpufreq.c
> @@ -21,6 +21,7 @@
>  #include <linux/of.h>
>  #include <linux/slab.h>
>  #include <linux/smp.h>
> +#include <sysdev/fsl_soc.h>
>
>  /**
>   * struct cpu_data - per CPU data struct
> @@ -205,7 +206,8 @@ static int corenet_cpufreq_cpu_init(struct cpufreq_policy *policy)
>         for_each_cpu(i, per_cpu(cpu_mask, cpu))
>                 per_cpu(cpu_data, i) = data;
>
> -       policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
> +       policy->cpuinfo.transition_latency =
> +                               (12 * NSEC_PER_SEC) / fsl_get_sys_freq();
>         of_node_put(np);
>
>         return 0;

Acked-by: Viresh Kumar <viresh.kumar@xxxxxxxxxx>
--
To unsubscribe from this list: send the line "unsubscribe cpufreq" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at  http://vger.kernel.org/majordomo-info.html




[Index of Archives]     [Linux Kernel Devel]     [Linux USB Devel]     [Linux Audio Users]     [Yosemite Forum]     [Linux SCSI]

  Powered by Linux