Hi - On 16 July 2013 07:43, Viresh Kumar <viresh.kumar@xxxxxxxxxx> wrote: > Adding few more lists so that others can also help.. > > On 15 July 2013 20:00, Comaschi, F. <fcomaschi@xxxxxx> wrote: >> 2) Recently I have read Andy Green’s presentation “How to measure SoC power”. However, by measuring power on the PMIC input side through the ARM Energy Probe, probably I won't be able to see the effect of DVFS. Do you have any suggestions on how to measure the effect of DVFS, even through hardware measurements? > > You need probes on the voltage regulator which is feed the cores... > But again, that is very much hardware specific. And I haven't worked > on Exynos at all :) Arndale has a lot of shunts on the board already, I counted 14 last time I looked. You will be able to see the power benefit of DVFS extremely clearly at the input side of the regulator, but you won't see the voltage you have set reported. Since the AEP creates trouble on low voltage / high current rails with its fullscale 165mV drop (you may only have 900mV on Vcore) measuring current needs to be done on regulator input side. Since you're interested in power, you need to measure voltage also at the regulator input to allow it to be calculated. However nothing stops you sticking a second AEP channel on the output side of the regulator just for monitoring its voltage. You just need to stick both wires of the pair on the output side for it to report the voltage separately. Because you're not using a shunt there, you don't introduce any voltage drop. Then you'll see power (+ regulator efficiency loss) one one channel and actual DVFS voltage (and 0 for current) on the other. -Andy -- To unsubscribe from this list: send the line "unsubscribe cpufreq" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
