On Fri, Apr 05, 2013 at 12:00:36PM +0200, Guennadi Liakhovetski wrote: > On SH73A0 the output of PLL0 is supplied to two dividers, feeding clock to > the CPU core and SGX. Lower CPU frequencies allow the use of lower supply > voltages and thus reduce power consumption. > > Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@xxxxxxxxx> > --- > > v5: not based on MSTP-waiting rework, it needs more work > > arch/arm/mach-shmobile/clock-sh73a0.c | 95 ++++++++++++++++++++++++++++++++- > 1 files changed, 93 insertions(+), 2 deletions(-) Thanks, queued-up for v3.11 in the soc-sh73a0 branch. -- To unsubscribe from this list: send the line "unsubscribe cpufreq" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
