Re: [PATCH] cpufreq/intel_pstate: Add function to check that all MSR's are valid

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On Wed, Mar 20, 2013 at 9:47 PM,  <dirk.brandewie@xxxxxxxxx> wrote:
> From: Dirk Brandewie <dirk.brandewie@xxxxxxxxx>
>
> Some VMs seem to try to implement some MSRs but not all the registers
> the driver needs.  Check to make sure all the MSR that we need are
> available. If any of the required MSRs are not available refuse to
> load.
>
> Signed-off-by: Dirk Brandewie <dirk.j.brandewie@xxxxxxxxx>
> ---
>  drivers/cpufreq/intel_pstate.c |   26 ++++++++++++++++++++++++++
>  1 files changed, 26 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c
> index f6dd1e7..cd9c5f4 100644
> --- a/drivers/cpufreq/intel_pstate.c
> +++ b/drivers/cpufreq/intel_pstate.c
> @@ -752,6 +752,29 @@ static struct cpufreq_driver intel_pstate_driver = {
>
>  static int __initdata no_load;
>
> +static int intel_pstate_msrs_not_valid(void)
> +{
> +       /* Check that all the msr's we are using are valid. */
> +       u64 aperf, mperf, tmp;
> +
> +       rdmsrl(MSR_IA32_APERF, aperf);
> +       rdmsrl(MSR_IA32_MPERF, mperf);
> +
> +       if (!intel_pstate_min_pstate() ||
> +               !intel_pstate_max_pstate() ||
> +               !intel_pstate_turbo_pstate())
> +               return -ENODEV;
> +
> +       rdmsrl(MSR_IA32_APERF, tmp);
> +       if (!(tmp - aperf))
> +               return -ENODEV;
> +
> +       rdmsrl(MSR_IA32_MPERF, tmp);
> +       if (!(tmp - mperf))
> +               return -ENODEV;
> +
> +       return 0;
> +}

Add blank line here.

>  static int __init intel_pstate_init(void)
>  {
>         int cpu, rc = 0;
> @@ -764,6 +787,9 @@ static int __init intel_pstate_init(void)
>         if (!id)
>                 return -ENODEV;
>
> +       if (intel_pstate_msrs_not_valid())
> +               return -ENODEV;
> +
>         pr_info("Intel P-state driver initializing.\n");
>
>         all_cpu_data = vmalloc(sizeof(void *) * num_possible_cpus());

Acked-by: Viresh Kumar <viresh.kumar@xxxxxxxxxx>
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