Re: About ersure-code and isal avx512

["Gohad, Tushar" <tushar.gohad@xxxxxxxxx>]

Hi Yufan,

You are correct about NASM and AVX512.   Patch for NASM support has been in backlog -- we haven't gotten around to it.  We'll get it submitted upstream soon.  Ganesh (cc'ed) can comment on the 64-byte alignment requirement.

Thanks,
Tushar


On 5/6/18, 6:16 PM, "ceph-devel-owner@xxxxxxxxxxxxxxx on behalf of YuFan Chen" <ceph-devel-owner@xxxxxxxxxxxxxxx on behalf of wiz.chen@xxxxxxxxx> wrote:

    Hi,
    
       ISA-L needs to define the macro to enable AVX512 feature:
               HAVE_AS_KNOWS_AVX512
    
       And, according to this:
            https://lists.01.org/pipermail/isal/2017-November/000022.html
    
        It seems that only NASM supports avx512.
    
       Besides, I have one more question, do it need 64-byte alignment of
    buffer in ceph?
    
    
    Yufan Chen
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