On Thu, 2005-12-29 at 09:07 +0000, Peter Farrow wrote:
> I think you all might find this useful:
> http://www.short-media.com/review.php?r=247
What does 18 month old article this explain on the ECC front?
Page 2 (and the subsequent test pages) basically restates what I did,
but names _no_ specifics on what supports what is for certain -- other
than talking about and testing Socket-940 Athlon FX with ECC Registered.
The article predates not only the Socket-939 Athlon FX, but it predates
the far more recent Socket-939 Opteron.
So, once again, I will re-iterate the _known_, _tested_ facts ...
1. For Registered ECC, go Socket-940 Opteron
2. For Unregistered ECC, go Socket-939 Opteron
There is absolutely _no_ guarantee that a Socket-939 Athlon 64 (much
less a Socket-754 Athlon 64 or Sempron [64]) will support ECC at all --
in ECC mode. And in the majority of cases, it's not even an option if
the BIOS/POST of the mainboard does not setup the registers and other
support (such as APIC) with ECC. And even if it is, enabling it doesn't
mean the CPU itself supports it -- that's where the new Socket-939
Opterons come in.
Much of the confusion over what the Athlon 64 can support revolves
around the fact that there was _not_ a Socket-939 at the release of the
Athlon 64 / Opteron -- only Socket-754 and 940. So all Athlon FX and 64
processors were either Socket-754 or 940, in addition to Opteron for
Socket-940.
Now we not only have a Socket-939 Athlon 64, but a new Socket-939
Opteron designed and marketed explicitly with unregistered ECC support.
Whether your Socket-939 mainboard has BIOS/POST setup support for ECC is
one thing -- most don't, and the majority that do are the new nForce4
SLI 16x with 40 PCIe channels that is basically the 2-chip "commodity"
version of the nForce Pro 2200 + 2050. But that doesn't mean it's
designed for Socket-939 Athlon 64 processors at all -- it's designed for
Socket-939 Opteron.
And the CPU defines the memory support. We all know all the 'Hammers
are basically the same -- one or two DDR channels for memory, one to
three HyperTransport channels for I/O and inter-CPU. But what is
enabled and, more importantly yet, what is tested/support -- two very
different things. ;->
--
Bryan J. Smith mailto:b.j.smith@xxxxxxxx
http://thebs413.blogspot.com
------------------------------------------
Some things (or athletes) money can't buy.
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