On Fri, Sep 29, 2023 at 5:54 AM Eduard Zingerman <eddyz87@xxxxxxxxx> wrote: > > On Thu, 2023-09-28 at 21:35 +0000, Dave Thaler wrote: > > In re-reading the instruction-set.rst changes for sign extensions, there is one ambiguity > > regarding BPF_ALU | BPF_MOVSX with offset = 32. > > > > Is it: > > a) Undefined (not a permitted instruction), or > > b) Defined as being synonymous with BPF_ALU | BPF_MOV? > > > > The table implies (b) when it says: > > > BPF_MOVSX 0xb0 8/16/32 dst = (s8,s16,s32)src > > > > But the following text could be interpreted as (): > > > ``BPF_ALU | BPF_MOVSX`` :term:`sign extends<Sign Extend>` 8-bit and 16-bit operands into 32 > > > bit operands, and zeroes the remaining upper 32 bits. > > Hi Dave, > > I checked current verifier implementation and it goes with option (a): that's correct. I think that sentence is clear enough: BPF_ALU | BPF_MOVSX`` :term:`sign extends<Sign Extend>` 8-bit and 16-bit operands into 32. Which means that 24-bit, 32-bit or other bit width is not permitted. I frankly don't see any ambiguity.
