On Wed, Sep 13, 2023 at 11:34:10PM +0800, Pu Lehui wrote: > From: Pu Lehui <pulehui@xxxxxxxxxx> > > There are many extension helpers in the current branch instructions, and > the implementation is a bit complicated. We simplify this logic through > two simple extension helpers with alternate register. > > Signed-off-by: Pu Lehui <pulehui@xxxxxxxxxx> > --- > arch/riscv/net/bpf_jit_comp64.c | 82 +++++++++++++-------------------- > 1 file changed, 31 insertions(+), 51 deletions(-) > > diff --git a/arch/riscv/net/bpf_jit_comp64.c b/arch/riscv/net/bpf_jit_comp64.c > index 4a649e195..1728ce16d 100644 > --- a/arch/riscv/net/bpf_jit_comp64.c > +++ b/arch/riscv/net/bpf_jit_comp64.c > @@ -141,6 +141,19 @@ static bool in_auipc_jalr_range(s64 val) > val < ((1L << 31) - (1L << 11)); > } > > +/* Modify rd pointer to alternate reg to avoid corrupting orignal reg */ Hi Pu Lehui, nit: original I suggest running checkpatch --codespell over this series before submitting v2.
