Hi, There is a common theme throughout several "bsps" in the stmmac driver which all code up the same thing: for 10M, 100M and 1G, select the appropriate 2.5MHz, 25MHz, or 125MHz clock. Rather than having every BSP implement the same thing but slightly differently, let's provide a single implementation which is passed the struct clk and the speed, and have that do the speed to clock rate decode. Note: only build tested. v2: - move dwmac_set_tx_clk_gmii() to stmmac_platform, and rename to have stmmac_ prefix. - add comment body to conversion patches - use %u for printing speed .../ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c | 36 ++++--------- drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c | 26 +++------- .../net/ethernet/stmicro/stmmac/dwmac-intel-plat.c | 34 +++--------- drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c | 60 ++++++---------------- .../net/ethernet/stmicro/stmmac/dwmac-starfive.c | 28 +++------- .../net/ethernet/stmicro/stmmac/stmmac_platform.c | 25 +++++++++ .../net/ethernet/stmicro/stmmac/stmmac_platform.h | 1 + 7 files changed, 74 insertions(+), 136 deletions(-) -- RMK's Patch system: https://www.armlinux.org.uk/developer/patches/ FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!
