Pu Lehui <pulehui@xxxxxxxxxxxxxxx> writes: > Add support cpu v4 instructions for RV64. The relevant tests have passed as show bellow: > > # ./test_progs-cpuv4 -a ldsx_insn,verifier_sdiv,verifier_movsx,verifier_ldsx,verifier_gotol,verifier_bswap [...] > Summary: 6/166 PASSED, 0 SKIPPED, 0 FAILED > > NOTE: ldsx_insn testcase uses fentry and needs to rely on ftrace direct call [0]. > [0] https://lore.kernel.org/all/20230627111612.761164-1-suagrfillet@xxxxxxxxx/ > > v2: > - Use temporary reg to avoid clobbering the source reg in movs_8/16 insns. (Björn) > - Add Acked-by Thanks for getting the cpuv4 RISC-V support out so quickly! For the series: Tested-by: Björn Töpel <bjorn@xxxxxxxxxxxx>