On Tue, Aug 22, 2023 at 2:13 AM Larysa Zaremba <larysa.zaremba@xxxxxxxxx> wrote:
>
> On Thu, Aug 17, 2023 at 02:58:26PM -0700, Alexei Starovoitov wrote:
> > On Fri, Aug 11, 2023 at 06:15:01PM +0200, Larysa Zaremba wrote:
> > > Implement .xmo_rx_csum callback to allow XDP code to determine,
> > > whether HW has validated any checksums.
> > >
> > > Signed-off-by: Larysa Zaremba <larysa.zaremba@xxxxxxxxx>
> > > ---
> > > drivers/net/ethernet/intel/ice/ice_txrx_lib.c | 26 +++++++++++++++++++
> > > 1 file changed, 26 insertions(+)
> > >
> > > diff --git a/drivers/net/ethernet/intel/ice/ice_txrx_lib.c b/drivers/net/ethernet/intel/ice/ice_txrx_lib.c
> > > index 6ae57a98a4d8..f11a245705bc 100644
> > > --- a/drivers/net/ethernet/intel/ice/ice_txrx_lib.c
> > > +++ b/drivers/net/ethernet/intel/ice/ice_txrx_lib.c
> > > @@ -660,8 +660,34 @@ static int ice_xdp_rx_vlan_tag(const struct xdp_md *ctx, u16 *vlan_tci,
> > > return 0;
> > > }
> > >
> > > +/**
> > > + * ice_xdp_rx_csum - RX checksum XDP hint handler
> > > + * @ctx: XDP buff pointer
> > > + * @csum_status: status destination address
> > > + * @csum: not used
> > > + */
> > > +static int ice_xdp_rx_csum(const struct xdp_md *ctx,
> > > + enum xdp_csum_status *csum_status, __wsum *csum)
> > > +{
> > > + const struct ice_xdp_buff *xdp_ext = (void *)ctx;
> > > + const union ice_32b_rx_flex_desc *eop_desc;
> > > + enum ice_rx_csum_status status;
> > > + u16 ptype;
> > > +
> > > + eop_desc = xdp_ext->pkt_ctx.eop_desc;
> > > + ptype = ice_get_ptype(eop_desc);
> > > +
> > > + status = ice_get_rx_csum_status(eop_desc, ptype);
> > > + if (status & ICE_RX_CSUM_FAIL)
> > > + return -ENODATA;
> > > +
> > > + *csum_status = XDP_CHECKSUM_VERIFIED;
> > > + return 0;
> > > +}
> > > +
> > > const struct xdp_metadata_ops ice_xdp_md_ops = {
> > > .xmo_rx_timestamp = ice_xdp_rx_hw_ts,
> > > .xmo_rx_hash = ice_xdp_rx_hash,
> > > .xmo_rx_vlan_tag = ice_xdp_rx_vlan_tag,
> > > + .xmo_rx_csum = ice_xdp_rx_csum,
> >
> > timestamp hint is implemented by igc, mlx4, mlx5, stmmac
> > hash hint is implemneted by igc, mlx4, mlx5.
> > With above csum and vlan hints will be in ice only.
> > I'd like to see at least one more driver to implement them as well to make sure
> > the proposed API works for other vendors.
>
> I have no other vendors on my current setup :/
>
> I could send an RFC of v5 + a compile-tested implementation for some other
> vendor, so you can see, how it might look.
compiled tested is a good step.
nvidia folks would need to test it and ack it, of course.
