Re: Register encoding in assembly for load/store instructions

[Alexei Starovoitov <alexei.starovoitov@xxxxxxxxx>]

On Fri, Jul 28, 2023 at 9:58 AM Eduard Zingerman <eddyz87@xxxxxxxxx> wrote:

> >
> > For disassembler, we have stx as well may use w* registers with alu32.
> > In llvm BPFDisassembler.cpp, we have
> >
> >    if ((InstClass == BPF_LDX || InstClass == BPF_STX) &&
> >        getInstSize(Insn) != BPF_DW &&
> >        (InstMode == BPF_MEM || InstMode == BPF_ATOMIC) &&
> >        STI.hasFeature(BPF::ALU32))
> >      Result = decodeInstruction(DecoderTableBPFALU3264, Instr, Insn,
> > Address,
> >                                 this, STI);
> >    else
> >      Result = decodeInstruction(DecoderTableBPF64, Instr, Insn, Address,
> > this,
> >                                 STI);
> >
> > Maybe we should just do
> >
> >    Result = decodeInstruction(DecoderTableBPF64, Instr, Insn, Address,
> > this, STI);
> >
> > So we already disassemble based on non-alu32 mode?
> >
>
> Yonghong, Alexei,
>
> I have a prototype [1] that consolidates STW/STW32, LDW/LDW32 etc
> instructions in LLVM BPF backend, thus removing the syntactic
> difference. I think it simplifies BPFInstrInfo.td a bit but that's up
> to debate.
>
> Should I proceed with it?
>
> [1] https://reviews.llvm.org/D156559

Makes sense to me.