Re: [PATCH] bpf, docs: Fix modulo zero, division by zero, overflow, and underflow

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On 1/20/23 9:16 PM, dthaler1968@xxxxxxxxxxxxxx wrote:
[...]
-BPF_MOD   0x90   dst %= src
+BPF_MOD 0x90 dst = (src != 0) ? (dst % src) : dst
[...]
+If execution would result in modulo by zero,
+the destination register is instead set to the source register
+as ``BPF_MOV`` would do, meaning that for ``BPF_ALU64`` the value
+is unchanged whereas for ``BPF_ALU`` the upper 32 bits are zeroed.

I think the "the destination register is instead set to the source register
as ``BPF_MOV`` would do" is a bit ambiguous. Could we just simplify it to the
following:

If execution would result in modulo by zero, for ``BPF_ALU64`` the value of
the destination register is unchanged whereas for ``BPF_ALU`` the upper 32 bits
of the destination register are zeroed.



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