Add tests for LDX/STX/ST instrumentation in each possible case. Four cases for STX/ST, include dst_reg equals to R0, R1, R10, other regs, respectively, ten cases for LDX. All new/existing selftests can pass. A slab-out-of-bounds read report is also availble, which is achieved by exploiting CVE-2022-23222 and can be reproduced in Linux v5.10: https://pastebin.com/raw/Ee1Cw492. Signed-off-by: Hao Sun <sunhao.th@xxxxxxxxx> --- .../selftests/bpf/verifier/sanitize_st_ldx.c | 323 ++++++++++++++++++ 1 file changed, 323 insertions(+) create mode 100644 tools/testing/selftests/bpf/verifier/sanitize_st_ldx.c diff --git a/tools/testing/selftests/bpf/verifier/sanitize_st_ldx.c b/tools/testing/selftests/bpf/verifier/sanitize_st_ldx.c new file mode 100644 index 000000000000..3fd571abc5cc --- /dev/null +++ b/tools/testing/selftests/bpf/verifier/sanitize_st_ldx.c @@ -0,0 +1,323 @@ +#ifdef CONFIG_BPF_PROG_KASAN +{ + "sanitize stx: dst is R1", + .insns = { + BPF_MOV64_REG(BPF_REG_1, BPF_REG_10), + BPF_ST_MEM(BPF_DW, BPF_REG_1, -8, 1), + BPF_LDX_MEM(BPF_DW, BPF_REG_0, BPF_REG_1, -8), + BPF_JMP_IMM(BPF_JEQ, BPF_REG_0, 1, 1), + BPF_MOV64_IMM(BPF_REG_0, 2), + BPF_EXIT_INSN(), + }, + .result = ACCEPT, + .retval = 1, + .expected_insns = { + BPF_MOV64_REG(MAX_BPF_REG, BPF_REG_0), + BPF_ALU64_IMM(BPF_ADD, BPF_REG_1, -8), + BPF_EMIT_CALL(INSN_IMM_MASK), + BPF_ALU64_IMM(BPF_ADD, BPF_REG_1, 8), + BPF_MOV64_REG(BPF_REG_0, MAX_BPF_REG), + BPF_ST_MEM(BPF_DW, BPF_REG_1, -8, 1), + }, +}, +{ + "sanitize stx: dst is R0", + .insns = { + BPF_MOV64_REG(BPF_REG_0, BPF_REG_10), + BPF_ST_MEM(BPF_DW, BPF_REG_0, -8, 1), + BPF_LDX_MEM(BPF_DW, BPF_REG_1, BPF_REG_0, -8), + BPF_JMP_IMM(BPF_JEQ, BPF_REG_1, 1, 2), + BPF_MOV64_IMM(BPF_REG_0, 2), + BPF_EXIT_INSN(), + BPF_MOV64_REG(BPF_REG_0, BPF_REG_1), + BPF_EXIT_INSN(), + }, + .result = ACCEPT, + .retval = 1, + .expected_insns = { + BPF_MOV64_REG(MAX_BPF_REG, BPF_REG_1), + BPF_MOV64_REG(BPF_REG_1, BPF_REG_0), + BPF_ALU64_IMM(BPF_ADD, BPF_REG_1, -8), + BPF_EMIT_CALL(INSN_IMM_MASK), + BPF_ALU64_IMM(BPF_ADD, BPF_REG_1, 8), + BPF_MOV64_REG(BPF_REG_0, BPF_REG_1), + BPF_MOV64_REG(BPF_REG_1, MAX_BPF_REG), + BPF_ST_MEM(BPF_DW, BPF_REG_0, -8, 1), + }, +}, +{ + "sanitize stx: dst is R10", + .insns = { + BPF_ST_MEM(BPF_DW, BPF_REG_10, -8, 1), + BPF_LDX_MEM(BPF_DW, BPF_REG_0, BPF_REG_10, -8), + BPF_JMP_IMM(BPF_JEQ, BPF_REG_0, 1, 1), + BPF_MOV64_IMM(BPF_REG_0, 2), + BPF_EXIT_INSN(), + }, + .result = ACCEPT, + .retval = 1, + .unexpected_insns = { + BPF_EMIT_CALL(INSN_IMM_MASK), + }, +}, +{ + "sanitize stx: dst is other regs", + .insns = { + BPF_MOV64_REG(BPF_REG_2, BPF_REG_10), + BPF_ST_MEM(BPF_DW, BPF_REG_2, -8, 1), + BPF_LDX_MEM(BPF_DW, BPF_REG_0, BPF_REG_2, -8), + BPF_JMP_IMM(BPF_JEQ, BPF_REG_0, 1, 1), + BPF_MOV64_IMM(BPF_REG_0, 2), + BPF_EXIT_INSN(), + }, + .result = ACCEPT, + .retval = 1, + .expected_insns = { + BPF_MOV64_REG(MAX_BPF_REG, BPF_REG_1), + BPF_MOV64_REG(BPF_REG_1, BPF_REG_2), + BPF_MOV64_REG(BPF_REG_2, BPF_REG_0), + BPF_ALU64_IMM(BPF_ADD, BPF_REG_1, -8), + BPF_EMIT_CALL(INSN_IMM_MASK), + BPF_ALU64_IMM(BPF_ADD, BPF_REG_1, 8), + BPF_MOV64_REG(BPF_REG_0, BPF_REG_2), + BPF_MOV64_REG(BPF_REG_2, BPF_REG_1), + BPF_MOV64_REG(BPF_REG_1, MAX_BPF_REG), + BPF_ST_MEM(BPF_DW, BPF_REG_2, -8, 1), + }, +}, +{ + "sanitize ldx: src is R1, dst is R0", + .insns = { + BPF_MOV64_REG(BPF_REG_1, BPF_REG_10), + BPF_ST_MEM(BPF_DW, BPF_REG_1, -8, 1), + BPF_LDX_MEM(BPF_DW, BPF_REG_0, BPF_REG_1, -8), + BPF_JMP_IMM(BPF_JEQ, BPF_REG_0, 1, 1), + BPF_MOV64_IMM(BPF_REG_0, 2), + BPF_EXIT_INSN(), + }, + .result = ACCEPT, + .retval = 1, + .expected_insns = { + BPF_ALU64_IMM(BPF_ADD, BPF_REG_1, -8), + BPF_EMIT_CALL(INSN_IMM_MASK), + BPF_ALU64_IMM(BPF_ADD, BPF_REG_1, 8), + BPF_LDX_MEM(BPF_DW, BPF_REG_0, BPF_REG_1, -8), + }, +}, +{ + "sanitize ldx: src is R1, dst is R1", + .insns = { + BPF_MOV64_REG(BPF_REG_1, BPF_REG_10), + BPF_ST_MEM(BPF_DW, BPF_REG_1, -8, 1), + BPF_LDX_MEM(BPF_DW, BPF_REG_1, BPF_REG_1, -8), + BPF_JMP_IMM(BPF_JEQ, BPF_REG_1, 1, 2), + BPF_MOV64_IMM(BPF_REG_0, 2), + BPF_EXIT_INSN(), + BPF_MOV64_REG(BPF_REG_0, BPF_REG_1), + BPF_EXIT_INSN(), + }, + .result = ACCEPT, + .retval = 1, + .expected_insns = { + BPF_MOV64_REG(MAX_BPF_REG, BPF_REG_0), + BPF_ALU64_IMM(BPF_ADD, BPF_REG_1, -8), + BPF_EMIT_CALL(INSN_IMM_MASK), + BPF_ALU64_IMM(BPF_ADD, BPF_REG_1, 8), + BPF_MOV64_REG(BPF_REG_0, MAX_BPF_REG), + BPF_LDX_MEM(BPF_DW, BPF_REG_1, BPF_REG_1, -8), + }, +}, +{ + "sanitize ldx: src is R1, dst is other regs", + .insns = { + BPF_MOV64_REG(BPF_REG_1, BPF_REG_10), + BPF_ST_MEM(BPF_DW, BPF_REG_1, -8, 1), + BPF_LDX_MEM(BPF_DW, BPF_REG_2, BPF_REG_1, -8), + BPF_JMP_IMM(BPF_JEQ, BPF_REG_2, 1, 2), + BPF_MOV64_IMM(BPF_REG_0, 2), + BPF_EXIT_INSN(), + BPF_MOV64_REG(BPF_REG_0, BPF_REG_2), + BPF_EXIT_INSN(), + }, + .result = ACCEPT, + .retval = 1, + .expected_insns = { + BPF_MOV64_REG(MAX_BPF_REG, BPF_REG_0), + BPF_ALU64_IMM(BPF_ADD, BPF_REG_1, -8), + BPF_EMIT_CALL(INSN_IMM_MASK), + BPF_ALU64_IMM(BPF_ADD, BPF_REG_1, 8), + BPF_MOV64_REG(BPF_REG_0, MAX_BPF_REG), + BPF_LDX_MEM(BPF_DW, BPF_REG_2, BPF_REG_1, -8), + }, +}, +{ + "sanitize ldx: src is R0, dst is R1", + .insns = { + BPF_MOV64_REG(BPF_REG_0, BPF_REG_10), + BPF_ST_MEM(BPF_DW, BPF_REG_0, -8, 1), + BPF_LDX_MEM(BPF_DW, BPF_REG_1, BPF_REG_0, -8), + BPF_JMP_IMM(BPF_JEQ, BPF_REG_1, 1, 2), + BPF_MOV64_IMM(BPF_REG_0, 2), + BPF_EXIT_INSN(), + BPF_MOV64_REG(BPF_REG_0, BPF_REG_1), + BPF_EXIT_INSN(), + }, + .result = ACCEPT, + .retval = 1, + .expected_insns = { + BPF_MOV64_REG(BPF_REG_1, BPF_REG_0), + BPF_ALU64_IMM(BPF_ADD, BPF_REG_1, -8), + BPF_EMIT_CALL(INSN_IMM_MASK), + BPF_ALU64_IMM(BPF_ADD, BPF_REG_1, 8), + BPF_MOV64_REG(BPF_REG_0, BPF_REG_1), + BPF_LDX_MEM(BPF_DW, BPF_REG_1, BPF_REG_0, -8), + }, +}, +{ + "sanitize ldx: src is R0, dst is R0", + .insns = { + BPF_MOV64_REG(BPF_REG_0, BPF_REG_10), + BPF_ST_MEM(BPF_DW, BPF_REG_0, -8, 1), + BPF_LDX_MEM(BPF_DW, BPF_REG_0, BPF_REG_0, -8), + BPF_JMP_IMM(BPF_JEQ, BPF_REG_0, 1, 1), + BPF_MOV64_IMM(BPF_REG_0, 2), + BPF_EXIT_INSN(), + }, + .result = ACCEPT, + .retval = 1, + .expected_insns = { + BPF_MOV64_REG(MAX_BPF_REG, BPF_REG_1), + BPF_MOV64_REG(BPF_REG_1, BPF_REG_0), + BPF_ALU64_IMM(BPF_ADD, BPF_REG_1, -8), + BPF_EMIT_CALL(INSN_IMM_MASK), + BPF_ALU64_IMM(BPF_ADD, BPF_REG_1, 8), + BPF_MOV64_REG(BPF_REG_0, BPF_REG_1), + BPF_MOV64_REG(BPF_REG_1, MAX_BPF_REG), + BPF_LDX_MEM(BPF_DW, BPF_REG_0, BPF_REG_0, -8), + }, +}, +{ + "sanitize ldx: src is R0, dst is other regs", + .insns = { + BPF_MOV64_REG(BPF_REG_0, BPF_REG_10), + BPF_ST_MEM(BPF_DW, BPF_REG_0, -8, 1), + BPF_LDX_MEM(BPF_DW, BPF_REG_2, BPF_REG_0, -8), + BPF_JMP_IMM(BPF_JEQ, BPF_REG_2, 1, 2), + BPF_MOV64_IMM(BPF_REG_0, 2), + BPF_EXIT_INSN(), + BPF_MOV64_REG(BPF_REG_0, BPF_REG_2), + BPF_EXIT_INSN(), + }, + .result = ACCEPT, + .retval = 1, + .expected_insns = { + BPF_MOV64_REG(MAX_BPF_REG, BPF_REG_1), + BPF_MOV64_REG(BPF_REG_1, BPF_REG_0), + BPF_ALU64_IMM(BPF_ADD, BPF_REG_1, -8), + BPF_EMIT_CALL(INSN_IMM_MASK), + BPF_ALU64_IMM(BPF_ADD, BPF_REG_1, 8), + BPF_MOV64_REG(BPF_REG_0, BPF_REG_1), + BPF_MOV64_REG(BPF_REG_1, MAX_BPF_REG), + BPF_LDX_MEM(BPF_DW, BPF_REG_2, BPF_REG_0, -8), + }, +}, +{ + "sanitize ldx: src is other regs, dst is R0", + .insns = { + BPF_MOV64_REG(BPF_REG_2, BPF_REG_10), + BPF_ST_MEM(BPF_DW, BPF_REG_2, -8, 1), + BPF_LDX_MEM(BPF_DW, BPF_REG_0, BPF_REG_2, -8), + BPF_JMP_IMM(BPF_JEQ, BPF_REG_0, 1, 1), + BPF_MOV64_IMM(BPF_REG_0, 2), + BPF_EXIT_INSN(), + }, + .result = ACCEPT, + .retval = 1, + .expected_insns = { + BPF_MOV64_REG(MAX_BPF_REG, BPF_REG_1), + BPF_MOV64_REG(BPF_REG_1, BPF_REG_2), + BPF_ALU64_IMM(BPF_ADD, BPF_REG_1, -8), + BPF_EMIT_CALL(INSN_IMM_MASK), + BPF_ALU64_IMM(BPF_ADD, BPF_REG_1, 8), + BPF_MOV64_REG(BPF_REG_1, MAX_BPF_REG), + BPF_LDX_MEM(BPF_DW, BPF_REG_0, BPF_REG_2, -8), + }, +}, +{ + "sanitize ldx: src is other regs, dst is R1", + .insns = { + BPF_MOV64_REG(BPF_REG_2, BPF_REG_10), + BPF_ST_MEM(BPF_DW, BPF_REG_2, -8, 1), + BPF_LDX_MEM(BPF_DW, BPF_REG_1, BPF_REG_2, -8), + BPF_JMP_IMM(BPF_JEQ, BPF_REG_1, 1, 2), + BPF_MOV64_IMM(BPF_REG_0, 2), + BPF_EXIT_INSN(), + BPF_MOV64_REG(BPF_REG_0, BPF_REG_1), + BPF_EXIT_INSN(), + }, + .result = ACCEPT, + .retval = 1, + .expected_insns = { + BPF_MOV64_REG(BPF_REG_1, BPF_REG_2), + BPF_MOV64_REG(MAX_BPF_REG, BPF_REG_0), + BPF_ALU64_IMM(BPF_ADD, BPF_REG_1, -8), + BPF_EMIT_CALL(INSN_IMM_MASK), + BPF_ALU64_IMM(BPF_ADD, BPF_REG_1, 8), + BPF_MOV64_REG(BPF_REG_0, MAX_BPF_REG), + BPF_LDX_MEM(BPF_DW, BPF_REG_1, BPF_REG_2, -8), + }, +}, +{ + "sanitize ldx: src is other regs, dst is self", + .insns = { + BPF_MOV64_REG(BPF_REG_2, BPF_REG_10), + BPF_ST_MEM(BPF_DW, BPF_REG_2, -8, 1), + BPF_LDX_MEM(BPF_DW, BPF_REG_2, BPF_REG_2, -8), + BPF_JMP_IMM(BPF_JEQ, BPF_REG_2, 1, 2), + BPF_MOV64_IMM(BPF_REG_0, 2), + BPF_EXIT_INSN(), + BPF_MOV64_REG(BPF_REG_0, BPF_REG_2), + BPF_EXIT_INSN(), + }, + .result = ACCEPT, + .retval = 1, + .expected_insns = { + BPF_MOV64_REG(MAX_BPF_REG, BPF_REG_1), + BPF_MOV64_REG(BPF_REG_1, BPF_REG_2), + BPF_MOV64_REG(BPF_REG_2, BPF_REG_0), + BPF_ALU64_IMM(BPF_ADD, BPF_REG_1, -8), + BPF_EMIT_CALL(INSN_IMM_MASK), + BPF_ALU64_IMM(BPF_ADD, BPF_REG_1, 8), + BPF_MOV64_REG(BPF_REG_0, BPF_REG_2), + BPF_MOV64_REG(BPF_REG_2, BPF_REG_1), + BPF_MOV64_REG(BPF_REG_1, MAX_BPF_REG), + BPF_LDX_MEM(BPF_DW, BPF_REG_2, BPF_REG_2, -8), + }, +}, +{ + "sanitize ldx: src is other regs, dst is other regs", + .insns = { + BPF_MOV64_REG(BPF_REG_2, BPF_REG_10), + BPF_ST_MEM(BPF_DW, BPF_REG_2, -8, 1), + BPF_LDX_MEM(BPF_DW, BPF_REG_3, BPF_REG_2, -8), + BPF_JMP_IMM(BPF_JEQ, BPF_REG_3, 1, 2), + BPF_MOV64_IMM(BPF_REG_0, 2), + BPF_EXIT_INSN(), + BPF_MOV64_REG(BPF_REG_0, BPF_REG_3), + BPF_EXIT_INSN(), + }, + .result = ACCEPT, + .retval = 1, + .expected_insns = { + BPF_MOV64_REG(MAX_BPF_REG, BPF_REG_1), + BPF_MOV64_REG(BPF_REG_1, BPF_REG_2), + BPF_MOV64_REG(BPF_REG_3, BPF_REG_0), + BPF_ALU64_IMM(BPF_ADD, BPF_REG_1, -8), + BPF_EMIT_CALL(INSN_IMM_MASK), + BPF_ALU64_IMM(BPF_ADD, BPF_REG_1, 8), + BPF_MOV64_REG(BPF_REG_0, BPF_REG_3), + BPF_MOV64_REG(BPF_REG_1, MAX_BPF_REG), + BPF_LDX_MEM(BPF_DW, BPF_REG_3, BPF_REG_2, -8), + }, +}, +#endif /* CONFIG_BPF_PROG_KASAN */ -- 2.38.1
