Re: [PATCHv3 bpf-next 3/6] bpf: Use given function address for trampoline ip arg

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On Fri, Sep 09, 2022 at 01:30:52PM +0200, Peter Zijlstra wrote:
> On Fri, Sep 09, 2022 at 12:12:42PM +0200, Jiri Olsa wrote:
> > Using function address given at the generation time as the trampoline
> > ip argument. This way we get directly the function address that we
> > need, so we don't need to:
> >   - read the ip from the stack
> >   - subtract X86_PATCH_SIZE
> >   - subtract ENDBR_INSN_SIZE if CONFIG_X86_KERNEL_IBT is enabled
> >     which is not even implemented yet ;-)
> > 
> > Signed-off-by: Jiri Olsa <jolsa@xxxxxxxxxx>
> > ---
> >  arch/x86/net/bpf_jit_comp.c | 9 ++++-----
> >  1 file changed, 4 insertions(+), 5 deletions(-)
> > 
> > diff --git a/arch/x86/net/bpf_jit_comp.c b/arch/x86/net/bpf_jit_comp.c
> > index ae89f4143eb4..1047686cc545 100644
> > --- a/arch/x86/net/bpf_jit_comp.c
> > +++ b/arch/x86/net/bpf_jit_comp.c
> > @@ -2039,13 +2039,14 @@ static int invoke_bpf_mod_ret(const struct btf_func_model *m, u8 **pprog,
> >  int arch_prepare_bpf_trampoline(struct bpf_tramp_image *im, void *image, void *image_end,
> >  				const struct btf_func_model *m, u32 flags,
> >  				struct bpf_tramp_links *tlinks,
> > -				void *orig_call)
> > +				void *func_addr)
> >  {
> >  	int ret, i, nr_args = m->nr_args, extra_nregs = 0;
> >  	int regs_off, ip_off, args_off, stack_size = nr_args * 8, run_ctx_off;
> >  	struct bpf_tramp_links *fentry = &tlinks[BPF_TRAMP_FENTRY];
> >  	struct bpf_tramp_links *fexit = &tlinks[BPF_TRAMP_FEXIT];
> >  	struct bpf_tramp_links *fmod_ret = &tlinks[BPF_TRAMP_MODIFY_RETURN];
> > +	void *orig_call = func_addr;
> >  	u8 **branches = NULL;
> >  	u8 *prog;
> >  	bool save_ret;
> > @@ -2126,12 +2127,10 @@ int arch_prepare_bpf_trampoline(struct bpf_tramp_image *im, void *image, void *i
> >  
> >  	if (flags & BPF_TRAMP_F_IP_ARG) {
> >  		/* Store IP address of the traced function:
> > -		 * mov rax, QWORD PTR [rbp + 8]
> > -		 * sub rax, X86_PATCH_SIZE
> > +		 * mov rax, func_addr
> 
> Shouldn't that be: movabs? Regular mov can't do 64bit immediates.

right, will change

jirka

> 
> Also curse Intel syntax, this is bloody unreadable.
> 
> >  		 * mov QWORD PTR [rbp - ip_off], rax
> >  		 */
> > -		emit_ldx(&prog, BPF_DW, BPF_REG_0, BPF_REG_FP, 8);
> > -		EMIT4(0x48, 0x83, 0xe8, X86_PATCH_SIZE);
> > +		emit_mov_imm64(&prog, BPF_REG_0, (long) func_addr >> 32, (u32) (long) func_addr);
> >  		emit_stx(&prog, BPF_DW, BPF_REG_FP, BPF_REG_0, -ip_off);
> >  	}
> >  
> > -- 
> > 2.37.3
> > 



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