Re: [PATCH bpf-next v5 09/11] bpf: Add bitwise atomic instructions

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On 12/15/20 4:18 AM, Brendan Jackman wrote:
This adds instructions for

atomic[64]_[fetch_]and
atomic[64]_[fetch_]or
atomic[64]_[fetch_]xor

All these operations are isomorphic enough to implement with the same
verifier, interpreter, and x86 JIT code, hence being a single commit.

The main interesting thing here is that x86 doesn't directly support
the fetch_ version these operations, so we need to generate a CMPXCHG
loop in the JIT. This requires the use of two temporary registers,
IIUC it's safe to use BPF_REG_AX and x86's AUX_REG for this purpose.

Signed-off-by: Brendan Jackman <jackmanb@xxxxxxxxxx>

Acked-by: Yonghong Song <yhs@xxxxxx>



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